TSMC's advanced packaging roadmap changes: CoWoS has a "longer lifecycle", next-generation CoPoS "won't arrive until Q4 2030 at the earliest"

The advanced packaging technology roadmap of TSMC is undergoing significant adjustments. The mass production timeline for CoPoS has been substantially delayed, elevating the strategic importance of CoWoS, a shift that will profoundly impact the investment logic throughout the semiconductor packaging supply chain.

According to DigiTimes' Friday report, due to higher-than-expected challenges in advancing CoPoS, TSMC's latest plan shows that the earliest batch of CoPoS packaged products will not be produced until the fourth quarter of 2030, which is a significant delay of about two years compared to the previous market expectation of mass production in 2028.

Meanwhile, TSMC's CoWoS production capacity for the next two years is fully booked, and the lifecycle of CoWoS is expected to be significantly extended compared to prior projections.

This adjustment means that suppliers in the chain who have bet on early CoPoS mass production face the risk of missing timelines, while equipment and material suppliers continuously benefiting from the expansion of CoWoS and SoIC stand a good chance of maintaining order visibility over a longer cycle. In addition, it is reported that the CoWoP project led by Nvidia and SPIL may also be put on hold, further reshaping the market landscape.

CoPoS Timeline Heavily Delayed, Technical Bottlenecks Are the Main Reason

According to DigiTimes citing supply chain sources, the core technical challenges faced by CoPoS lie in "uniformity" and "warpage," leading TSMC to internally conclude that CoPoS would not achieve mass production swiftly.

From the latest planning milestones, TSMC will begin bringing in equipment for development in the third quarter of 2026, with about one year needed to establish the R&D line. Equipment orders for the pilot line will only be placed in the third quarter of 2027, with a delivery lead time of approximately three quarters. The pilot equipment will enter the Chiayi P7 plant in the second quarter of 2028, followed by about a year of verification and adjustment. It is estimated that only in mid-to-late 2029 will mass production machines be finalized and orders placed with the supply chain. After another three quarters for delivery, equipment will be installed in the first quarter of 2030, and the earliest batch of packaged products will be produced in the fourth quarter of 2030.

It is worth noting that, as reported, TSMC has extremely high demands on suppliers participating in CoPoS joint development, even requiring some equipment vendors to sign restrictive covenants prohibiting the sale of related technologies or equipment to other customers, further raising the participation threshold and development costs for the supply chain.

CoWoS and SoIC Expansion Accelerates, Nvidia Locks in Bulk Capacity

Against the backdrop of CoPoS delays, the strategic value of CoWoS is further highlighted.

Not only Nvidia and AMD, but ASIC customers are also entering with large orders, making TSMC's CoWoS capacity for the next two years fully booked. Tainan AP8 P1 plant will have a monthly capacity of over 40,000 wafers by the end of the year, while the P2 plant is also being rapidly constructed.

Regarding SoIC, TSMC plans to ramp up the Chiayi plant's monthly SoIC capacity from the current nearly 10,000 wafers to 50,000 by 2027, with Nvidia securing the bulk of the capacity and about 10% to be used for Co-Packaged Optics (CPO). This expansion clearly benefits hybrid bonding equipment suppliers, and market analysts suggest that related equipment orders are likely to follow.

Overall, with ongoing CoWoS expansion and accelerating SoIC production, supply risks in the chain are expected to be much lower in the next few years than before, and profitability visibility for equipment and materials suppliers will correspondingly improve.

CoWoP Project Faces Delay, Supply Chain Landscape Reshaped

The CoWoP project jointly led by Nvidia and SPIL may face postponement. The main reason is the higher technical difficulty and cost, with SPIL and Taiwanese PCB players showing little interest in participating.

The potential shelving of the CoWoP project further concentrates market attention on TSMC's own packaging technology roadmap. With CoPoS mass production out of reach and CoWoP advancement hindered, CoWoS and SoIC will remain the cornerstone of TSMC's advanced packaging for quite some time, and the capital expenditure rhythm and order structure for the relevant supply chain will be repriced accordingly.